1. [Field of the Invention]
The present invention relates to semiconductor devices and manufacturing methods of the same, particularly suitable for applying to semiconductor memories using compound semiconductors with ultimate microstructures.
2. [Description of the Related Art]
In semiconductor devices, highly integrated semiconductor memories operable with low power consumption are required in recent years. As one candidate of such ultimate devices, expectation has been placed on a so-called quantum dot memory, which has a quantum box structure (quantum dot structure) provided as a floating gate to store/emit electrons, and a micro-channel provided to detect a charging operation of electrons to the quantum dot structure by a modulation in current.
In case of flash memories having floating gates, the formation of an ultimate quantum dot structure by reducing size of a semiconductor layer which is to be a floating gate, makes it possible to reduce power consumption and achieve a high-density integration. However, if a quantum dot memory is manufactured using a Si-base material, a Si/SiO2 interface has a high interface state density, which is difficult to reduce. Consequently, it is difficult to form a clean quantum dot structure. In materials for compound semiconductors, interface state density is relatively low. Thus a clean quantum dot structure can be easily formed. However, Because of its low heterojunction barrier height, the memory operates only in a low temperature range, and it is impossible to secure a memory holding time at a room temperature.
An example of semiconductor device using such a quantum dot structure is disclosed in Japanese Patent Application Laid-Open No. 10-144877 (1998). This semiconductor device is designed as a low power consumption memory device, which can modulate a current flowing between source and drain electrodes formed at both ends of a quantum wire by injecting/removing electrons into/out of quantum dot structures formed on the quantum wire. In this case, only one quantum dot structure is provided between the source and drain electrodes, and the memory device can efficiently modulate a current by charging the one quantum dot structure, and can be operated by an ultimately small number of electrons. However, since it is impossible to form source/drain electrodes and gate electrodes in accordance with such a micro-quantum dot structure by means of lithography, it is extremely difficult to manufacture such semiconductor devices at a high yield.
As apparent from the foregoing, semiconductor devices using quantum dot structures are expected as next-generation semiconductor memories capable of achieving ultimate high-density integration. On the other hand, such semiconductor devices involve serious problems including the difficulty of manufacturing, the difficulty of securing sufficient functionality at a room temperature and so on.
It is an object of the present invention to provide semiconductor devices capable of securing sufficient functionality at a room temperature by using a quantum dot structure, and achieving an ultimate high-density integration with high reliability.
It is another object of the present invention to provide a manufacturing method of semiconductor devices, in which a quantum dot structure can easily be made.
The present invention is directed to semiconductor devices, in particular, compound semiconductor devices, in which a first semiconductor layer of a first conductive type, a second semiconductor layer of a second conductive type, and a third semiconductor layer of the first conductive type are sequentially laminated in this order on a semiconductor substrate. Such a semiconductor device has a quantum box structure at one portion of the second semiconductor layer. The quantum box structure has a smaller band-gap width in comparison with the other portions. Either the energy level of a valence band of the quantum box structure or the acceptor level of the quantum box structure is set to be substantially equal to the Fermi level of the first or third semiconductor layer.
According to an aspect of the present invention, the first conductive type is n-type, and the second conductive type is p-type. The second semiconductor layer has a structure in which p-AlGaAs, i-InGaAs and p-AlGaAs are sequentially laminated in this order. Electrons are injected/emitted only to/from the energy level of the valence band of the quantum box structure by the electrons tunneling through a p-n junction barrier.
According to another aspect of the present invention, the first conductive type is n-type, and the second conductive type is p-type. The second semiconductor layer has a structure in which p-AlGaAs, p-InGaAs and p-AlGaAs are sequentially laminated in this order. Electrons are injected/emitted only to/from the acceptor level of the quantum box structure by the electrons tunneling through a p-n junction barrier.
In a manufacturing method of a semiconductor device according to the present invention, the semiconductor device having the foregoing construction is manufactured. More specifically, the method comprises the steps of: forming a groove structure in a semiconductor substrate; and sequentially laminating, in the groove structure, a first semiconductor layer of a first conductive type, a second semiconductor layer of a second conductive type and a third semiconductor layer of the first conductive type. In the bottom portion of the second semiconductor layer of the groove structure, a quantum box structure having a smaller band-gap width in comparison with the other portions is formed, and either the energy level of a valence band of the quantum box structure or the acceptor level of the quantum box structure is set to be substantially equal to the Fermi level of the first or third semiconductor layer.
According to an aspect of the present invention, the first conductive type is n-type, and the second conductive type is p-type. The second semiconductor layer is formed into a structure by means of an MOVPE method, in which p-AlGaAs, i-InGaAs and p-AlGaAs are sequentially laminated in this order, so that the quantum box structure is naturally formed in the above bottom portion.
According to another aspect of the present invention, the first conductive type is n-type, and the second conductive type is p-type. The second semiconductor layer is formed into a structure by means of an MOVPE method, in which p-AlGaAs, p-InGaAs and p-AlGaAs are sequentially laminated in this order, so that the quantum box structure is naturally formed in the above bottom portion.
According to the semiconductor device of the present invention, the second semiconductor layer located between the first and third semiconductor layers has a quantum box structure (quantum dot structure) with a small band-gap width. Storing electrons in the energy level of a valence band of the quantum box structure or in the acceptor level of the quantum box structure enables the semiconductor device to operate as a memory. In this case, since the barrier height which the stored electrons have to jump over when they are emitted is larger than the band-gap width of the quantum box structure, the probability of unexpected electron injection/emission in the process of thermal excitation is low enough to be ignored. Accordingly, a sufficient electron holding time is secured at a room temperature to assure an accurate operation.
Therefore, according to the present invention, it is possible to realize semiconductor devices capable of securing their sufficient functionality at a room temperature by using such quantum dot structures, and achieving ultimate high-density integration with high reliability. It is also possible to manufacture su h semiconductor devices easily and surely.